Where: Platform → project Context page.
Hardware
Three upload slots:- Schematics —
.SchDoc(Altium),.kicad_sch(KiCAD),.sch, or XML. - Datasheets — PDFs of the chips, sensors, and modules in your build.
- BOM — XLSX, CSV, or ODS. Upload kicks off a Nexar datasheet fetch per MPN; misses are reported per-line so you can fill the gap manually.
Supporting docs
Design notes, SOPs, ICDs, test plans. PDF, DOCX, or Markdown. Seb reads them as project context whenever it reasons about your codebase.Target a compliance standard
Pick the standards your project is held to — DO-178C, ISO 26262, IEC 62304. These drive the traceability rules used by gap analysis.Requirements and gap analysis
Skip if you’re not under formal compliance and have no structured spec to grade code against — the agent loop in step 3 works without requirements. Upload on the Context page’s Requirements card:- CSV — a mapping preview confirms which columns are id / text / level / safety class.
- PRD / DOCX / PDF / MD / TXT — Seb extracts shall-statements and proposes a requirement list; you accept it before it lands.
- Code:
resolved/stub/broken/no_trace - Test: same scale
/requirements) as a status board with a coverage bar. Click any card to read the verdict, resolve ambiguous traces, or hit Launch agent to fix the gap. Launching opens the same New Agent chat as step 3, pre-scoped to that requirement.
Hit Sync to rerun. Hideout also auto-reruns when a trace points at a file that’s changed since the last run.

